Datasheet: 
CD4053B CMOS Dual 4-Stage Static Shift Register
Package: PDIP (N) |16 DIP16 plastic dual in-line package; 16 leads (300 mil)
Features:
- Wide Range of Digital and Analog Signal Levels
- Digital...3V to 20V
- Analog...
20VP-P
- Low ON Resistance, 125
(Typ) Over 15VP-P Signal Input Range for VDD–VEE = 18V
- High OFF Resistance, Channel Leakage of ±100pA (Typ) at VDD–VEE = 18V
- Logic-Level Conversion for Digital Addressing Signals of 3V to 20V (VDD–VSS = 3V to 20V) to Switch Analog Signals to 20VP-P (VDD–VEE = 20V)
- Matched Switch Characteristics, rON = 5 (Typ) for VDD–VEE = 15V
- Very Low Quiescent Power Dissipation Under All Digital-Control Input and Supply Conditions, 0.2µW (Typ) at VDD–VSS = VDD–VEE = 10V
- Binary Address Decoding on Chip
- 5V, 10V and 15V Parametric Ratings
- 10% Tested for Quiescent Current at 20V
- Maximum Input Current of 1µA at 18V Over Full Package Temperature Range, 100nA at 18V and 25°C
- Break-Before-Make Switching Eliminates Channel Overlap
- Applications
- Analog and Digital Multiplexing and Demultiplexing
- A/D and D/A Conversion
- Signal Gating
Data sheet acquired from Harris Semiconductor
DESCRIPTION/ORDERING INFORMATION:
CD4015B consists of two identical, independent, 4-stage serial-input/parallel-output registers. Each register has independent CLOCK and RESET inputs as well as a single serial DATA input. "Q" outputs are available from each of the four stages on both registers. All register stages are D-type, master-slave flip-flops. The logic level present at the DATA input is transferred into the first register stage and shifted over one stage at each positive-going clock transition. Resetting of all stages is accomplished by a high level on the reset line. Register expansion to 8 stages using one CD4015B package, or to more than 8 stages using additional CD4015B’s is possible.
The CD4015B-series types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic package (E suffix), 16-lead small-outline packages (M, M96, MT, and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).
link: http://focus.ti.com/docs/prod/folders/print/cd4015b.html